| LDR | | 03254cam a22004933i 4500 |
| 001 | | 000000412733 |
| 005 | | 20190131143545 |
| 006 | | m o d |
| 007 | | cr cnu|||unuuu |
| 008 | | 160613s2016 xx o 000 0 eng d |
| 020 | |
▼a 9781522501916
▼q (electronic bk.) |
| 020 | |
▼a 1522501916
▼q (electronic bk.) |
| 020 | |
▼z 9781522501909 |
| 029 | 1 |
▼a AU@
▼b 000061242107 |
| 035 | |
▼a (OCoLC)951623902 |
| 040 | |
▼a N$T
▼b eng
▼e rda
▼e pn
▼c N$T
▼d IDEBK
▼d EBLCP
▼d IGIGL
▼d OCLCO
▼d OCLCF
▼d OCLCO
▼d N$T
▼d OCLCO
▼d OCLCQ
▼d 247004 |
| 050 | 4 |
▼a TK7874.66 .D47 |
| 072 | 7 |
▼a TEC
▼x 009070
▼2 bisacsh |
| 082 | 04 |
▼a 621.39/5 |
| 100 | 1 |
▼a Sharma, Manoj. |
| 245 | 10 |
▼a Design and Modeling of Low Power VLSI Systems. |
| 260 | |
▼a [Place of publication not identified]:
▼b IGI Global,
▼c 2016. |
| 300 | |
▼a 1 online resource. |
| 336 | |
▼a text
▼b txt
▼2 rdacontent |
| 337 | |
▼a computer
▼b c
▼2 rdamedia |
| 338 | |
▼a online resource
▼b cr
▼2 rdacarrier |
| 505 | 0 |
▼a Low power design techniques: classical and beyond CMOS era / Mohd Samar Ansari, Shailendra Kumar Tripathi -- Low power strategies for beyond Moore's Law era: low power device technologies and materials / B. Shivalal Patro, Vandana B. -- Challenges and limitations of low power techniques: low power methodologies in analog and digital circuits / Vandana B., Patro B. S. -- Leakage minimization in CMOS VLSI circuits: a brief review / Saurabh Chaudhury, Rohit Lorenzo -- Contemporary low power design approaches / Lini Lee -- Low power VLSI circuit design using energy recovery techniques / V. S. Kanchana Bhaaskaran -- State-of-the-art master slave flip-flop designs for low power VLSI systems / Kunwar Singh, Satish Chandra Tiwari, Maneesha Gupta -- Signal-adaptive analog-to-digital converters for ULP wearable and implantable medical devices: a survey / Nabi Sertac Artan -- The design of ultra low power RF CMOS LNA in nanometer technology / Kavyashree P., Siva S. Yellampalli -- Low power arithmetic circuit design for multimedia applications / Senthil C. Pari -- Case study: system on a chip for electric stimulation / Martha Salome Lopez -- Low power design of high speed communication system using IO standard technique over 28 nm VLSI chip / Bhagwan Das, Mohammad Faiz Liew Abdullah. |
| 588 | 0 |
▼a Vendor-supplied metadata. |
| 590 | |
▼a eBooks on EBSCOhost
▼b All EBSCO eBooks |
| 650 | 0 |
▼a Low voltage integrated circuits
▼x Design and construction. |
| 650 | 0 |
▼a Integrated circuits
▼x Very large scale integration
▼x Design and construction. |
| 650 | 7 |
▼a Integrated circuits
▼x Very large scale integration
▼x Design and construction.
▼2 fast
▼0 (OCoLC)fst00975610 |
| 650 | 7 |
▼a Low voltage integrated circuits
▼x Design and construction.
▼2 fast
▼0 (OCoLC)fst01003180 |
| 650 | 7 |
▼a TECHNOLOGY & ENGINEERING / Mechanical
▼2 bisacsh |
| 655 | 4 |
▼a Electronic books. |
| 700 | 1 |
▼a Gautam, Ruchi, |
| 700 | 1 |
▼a Khan, Mohammad Ayoub, |
| 856 | 40 |
▼u http://libproxy.dhu.ac.kr/_Lib_Proxy_Url/http://search.ebscohost.com/login.aspx?direct=true&scope=site&db=nlebk&AN=1247567 |
| 938 | |
▼a EBSCOhost
▼b EBSC
▼n 1247567 |
| 938 | |
▼a ProQuest MyiLibrary Digital eBook Collection
▼b IDEB
▼n cis34805776 |
| 938 | |
▼a EBL - Ebook Library
▼b EBLB
▼n EBL4544780 |
| 938 | |
▼a IGI Global
▼b IGIG
▼n 00142202 |
| 990 | |
▼a ***1012033 |