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020 ▼a 9780438145603
035 ▼a (MiAaPQ)AAI10791177
035 ▼a (MiAaPQ)umd:18938
040 ▼a MiAaPQ ▼c MiAaPQ ▼d 247004
0820 ▼a 621.3
1001 ▼a Xie, Yang. ▼0 (orcid) 0000-0001-6127-3908.
24510 ▼a Circuit Design Obfuscation for Hardware Security.
260 ▼a [S.l.]: ▼b University of Maryland, College Park., ▼c 2018.
260 1 ▼a Ann Arbor: ▼b ProQuest Dissertations & Theses, ▼c 2018.
300 ▼a 174 p.
500 ▼a Source: Dissertation Abstracts International, Volume: 79-12(E), Section: B.
500 ▼a Adviser: Ankur Srivastava.
5021 ▼a Thesis (Ph.D.)--University of Maryland, College Park, 2018.
520 ▼a Nowadays, chip design and chip fabrication are normally conducted separately by independent companies. Most integrated circuit (IC) design companies are now adopting a fab-less model: they outsource the chip fabrication to offshore foundries whi
520 ▼a Logic locking is a gate-level design obfuscation technique that's proposed to protect the outsourced IC designs from piracy and counterfeiting by untrusted foundries. A locked IC preserves the correct functionality only when a correct key is pro
520 ▼a Split fabrication based on 3D integration technology is another approach to obfuscate the outsourced IC designs. 3D integration is a technology that integrates multiple 2D dies to create a single high-performance chip, referred to as 3D IC. With
590 ▼a School code: 0117.
650 4 ▼a Electrical engineering.
650 4 ▼a Computer engineering.
690 ▼a 0544
690 ▼a 0464
71020 ▼a University of Maryland, College Park. ▼b Electrical Engineering.
7730 ▼t Dissertation Abstracts International ▼g 79-12B(E).
773 ▼t Dissertation Abstract International
790 ▼a 0117
791 ▼a Ph.D.
792 ▼a 2018
793 ▼a English
85640 ▼u http://www.riss.kr/pdu/ddodLink.do?id=T14997627 ▼n KERIS ▼z 이 자료의 원문은 한국교육학술정보원에서 제공합니다.
980 ▼a 201812 ▼f 2019
990 ▼a ***1012033