| LDR | | 02904nam u200433 4500 |
| 001 | | 000000421848 |
| 005 | | 20190215165643 |
| 008 | | 181129s2018 |||||||||||||||||c||eng d |
| 020 | |
▼a 9780438294721 |
| 035 | |
▼a (MiAaPQ)AAI10749726 |
| 035 | |
▼a (MiAaPQ)uci:14975 |
| 040 | |
▼a MiAaPQ
▼c MiAaPQ
▼d 247004 |
| 082 | 0 |
▼a 004 |
| 100 | 1 |
▼a Shoushtari, Abdolmajid Namaki. |
| 245 | 10 |
▼a Software Assists to On-chip Memory Hierarchy of Manycore Embedded Systems. |
| 260 | |
▼a [S.l.]:
▼b University of California, Irvine.,
▼c 2018. |
| 260 | 1 |
▼a Ann Arbor:
▼b ProQuest Dissertations & Theses,
▼c 2018. |
| 300 | |
▼a 174 p. |
| 500 | |
▼a Source: Dissertation Abstracts International, Volume: 80-01(E), Section: B. |
| 500 | |
▼a Adviser: Nikil D. Dutt. |
| 502 | 1 |
▼a Thesis (Ph.D.)--University of California, Irvine, 2018. |
| 520 | |
▼a The growing computing demands of emerging application domains such as Recognition/Mining/Synthesis (RMS), visual computing, wearable devices and the Internet of Things (IoT) has driven the move towards manycore architectures to better manage tra |
| 520 | |
▼a The memory hierarchy of manycore architectures has a major impact on their overall performance, energy efficiency and reliability. We identify three major problems that make traditional memory hierarchies unattractive for manycore architectures |
| 520 | |
▼a This thesis argues that many of these inefficiencies are the result of software-agnostic hardware-managed memory hierarchies. Application semantics and behavior captured in software can be exploited to more efficiently manage the memory hierarch |
| 520 | |
▼a We first present the required hardware and software support for a software-assisted memory hierarchy that is composed of distributed memories which can be partitioned between caches and software-programmable memories (SPMs) at runtime. This memo |
| 520 | |
▼a Next, we augment caches and SPMs in this hierarchy with approximation support in order to improve the energy efficiency of the memory subsystem when running approximate programs. We present approximation techniques for major building blocks of o |
| 520 | |
▼a We implemented all software and hardware components of the proposed software-assisted memory hierarchy in the gem5 architectural simulator. Our simulations on a mix of RMS and microbenchmarks show that our proposed techniques achieve better perf |
| 590 | |
▼a School code: 0030. |
| 650 | 4 |
▼a Computer science. |
| 690 | |
▼a 0984 |
| 710 | 20 |
▼a University of California, Irvine.
▼b Computer Science - Ph.D.. |
| 773 | 0 |
▼t Dissertation Abstracts International
▼g 80-01B(E). |
| 773 | |
▼t Dissertation Abstract International |
| 790 | |
▼a 0030 |
| 791 | |
▼a Ph.D. |
| 792 | |
▼a 2018 |
| 793 | |
▼a English |
| 856 | 40 |
▼u http://www.riss.kr/pdu/ddodLink.do?id=T14997061
▼n KERIS
▼z 이 자료의 원문은 한국교육학술정보원에서 제공합니다. |
| 980 | |
▼a 201812
▼f 2019 |
| 990 | |
▼a ***1012033 |