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Addressing Integrated Circuit Integrity Using Statistical Analysis and Machine Learning Techniques
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| 자료유형 | 학위논문 |
|---|---|
| 서명/저자사항 | Addressing Integrated Circuit Integrity Using Statistical Analysis and Machine Learning Techniques. |
| 개인저자 | Cakir, Burcin. |
| 단체저자명 | Princeton University. Electrical Engineering. |
| 발행사항 | [S.l.]: Princeton University., 2018. |
| 발행사항 | Ann Arbor: ProQuest Dissertations & Theses, 2018. |
| 형태사항 | 114 p. |
| 기본자료 저록 | Dissertation Abstracts International 79-10B(E). Dissertation Abstract International |
| ISBN | 9780438050280 |
| 학위논문주기 | Thesis (Ph.D.)--Princeton University, 2018. |
| 일반주기 |
Source: Dissertation Abstracts International, Volume: 79-10(E), Section: B.
Adviser: Sharad Malik. |
| 요약 | Outsourcing of design and manufacturing processes makes integrated circuits (ICs) vulnerable to adversarial changes and raises concerns about their security and integrity. The difference in the levels of abstraction between the initial specifica |
| 요약 | In this thesis, we present a novel approach for the analysis of circuits using graph algorithms and different concepts from linear algebra, signal processing and machine learning techniques to detect malicious insertions and reverse engineer a g |
| 요약 | All algorithms have been implemented and demonstrated to be scalable to significant sized ICs. They present valuable insights for reverse engineering digital ICs as well as for Trojan detection. |
| 일반주제명 | Electrical engineering. |
| 언어 | 영어 |
| 바로가기 | 
: 이 자료의 원문은 한국교육학술정보원에서 제공합니다. |
