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Architectural Techniques to Enhance the Efficiency of Accelerator-Centric Architectures
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| 자료유형 | 학위논문 |
|---|---|
| 서명/저자사항 | Architectural Techniques to Enhance the Efficiency of Accelerator-Centric Architectures. |
| 개인저자 | Hao, Yuchen. |
| 단체저자명 | University of California, Los Angeles. Computer Science 0201. |
| 발행사항 | [S.l.]: University of California, Los Angeles., 2018. |
| 발행사항 | Ann Arbor: ProQuest Dissertations & Theses, 2018. |
| 형태사항 | 118 p. |
| 기본자료 저록 | Dissertation Abstracts International 79-10B(E). Dissertation Abstract International |
| ISBN | 9780438024861 |
| 학위논문주기 | Thesis (Ph.D.)--University of California, Los Angeles, 2018. |
| 일반주기 |
Source: Dissertation Abstracts International, Volume: 79-10(E), Section: B.
Adviser: Glenn D. Reinman. |
| 요약 | In light of the failure of Dennard scaling and recent slowdown of Moore's Law, both industry and academia seek drastic measures to sustain the scalability of computing in order to meet the ever-growing demands. Customized hardware accelerator in |
| 요약 | This dissertation presents a series of architectural techniques to enhance the efficiency of accelerator-centric architectures. Staring with physical integration, we propose the Hybrid network with Predictive Reservation (HPR) to reduce data mov |
| 요약 | The techniques described in this dissertation demonstrate some initial steps towards efficient accelerator-centric architectures. We hope that this work, and other research in the area, will address many issues of integrating customized accelera |
| 일반주제명 | Computer science. |
| 언어 | 영어 |
| 바로가기 | 
: 이 자료의 원문은 한국교육학술정보원에서 제공합니다. |
