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Mathematical Compact Models of Advanced Transistors for Numerical Simulation and Hardware Design
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| 자료유형 | 학위논문 |
|---|---|
| 서명/저자사항 | Mathematical Compact Models of Advanced Transistors for Numerical Simulation and Hardware Design. |
| 개인저자 | Duarte, Juan Pablo Duarte. |
| 단체저자명 | University of California, Berkeley. Electrical Engineering & Computer Sciences. |
| 발행사항 | [S.l.]: University of California, Berkeley., 2018. |
| 발행사항 | Ann Arbor: ProQuest Dissertations & Theses, 2018. |
| 형태사항 | 164 p. |
| 기본자료 저록 | Dissertation Abstracts International 80-01B(E). Dissertation Abstract International |
| ISBN | 9780438324237 |
| 학위논문주기 | Thesis (Ph.D.)--University of California, Berkeley, 2018. |
| 일반주기 |
Source: Dissertation Abstracts International, Volume: 80-01(E), Section: B.
Adviser: Chenming Hu. |
| 요약 | Mathematical compact models play a key role in designing integrated circuits. They serve as a medium of information exchange between foundries and designers. A compact model, which is a set of long mathematical equations based on the physics of |
| 요약 | Since traditional transistor scaling had reached limitations due short-channel effects and oxide tunneling, the introduction of FinFET and UTBSOIs in high-volume manufacturing at 20nm, 14nm and 10nm technology nodes had let the electronic indust |
| 요약 | For extremely scaled technologies, NC-FETs are quickly emerging as preferred candidates for digital and analog applications. The recent discovery of ferroelectric (FE) materials using conventional CMOS fabrication technology has led to the first |
| 요약 | This thesis gives insights into the device physics and behavior of FE based negative capacitance FinFETs (NC-FinFETs) by presenting numerical simulations, compact models, and circuit evaluation of these devices. NC-FinFETs may have a floating me |
| 일반주제명 | Electrical engineering. |
| 언어 | 영어 |
| 바로가기 | 
: 이 자료의 원문은 한국교육학술정보원에서 제공합니다. |
