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Barrier Layers and Metal Fill for Back End of Line Processing

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서명/저자사항Barrier Layers and Metal Fill for Back End of Line Processing.
개인저자Wolf, Steven Frank.
단체저자명University of California, San Diego. Materials Science and Engineering.
발행사항[S.l.]: University of California, San Diego., 2019.
발행사항Ann Arbor: ProQuest Dissertations & Theses, 2019.
형태사항113 p.
기본자료 저록Dissertations Abstracts International 81-04B.
Dissertation Abstract International
ISBN9781088330197
학위논문주기Thesis (Ph.D.)--University of California, San Diego, 2019.
일반주기 Source: Dissertations Abstracts International, Volume: 81-04, Section: B.
Advisor: Kummel, Andrew C.
이용제한사항This item must not be sold to any third party vendors.
요약As semiconductor devices continue to scale down below the 10 nm node, deposition of conformal, ultra-thin layers on high aspect ratio features becomes very challenging. As such, there is a need to deposit these materials with precise thickness and stoichiometry control via atomic layer deposition (ALD). Two main applications for ALD occur during BEOL microelectronic device processing after the MOSFET has been fabricated: barrier layer deposition and interconnect fill. These two applications will be the focus of this dissertation. ALD barrier layers are typically conductive nitrides, as such, this work will discuss growing several nitrides with ALD using N2H4 which has the main advantage of being able to grow at lower deposition temperatures. Commonly used barrier layers, titanium nitride (TiN) and tantalum nitride (TaN) have been extensively studied in devices because of their ideal thermal, mechanical, and electrical properties and ability to act as metal diffusion barriers, but typically require high deposition temperatures due to using less reactive NH3 as the N-containing precursor. Additionally, amorphous boron nitride was explored due to it having shorter bonds than TiN and TaN potentially making it a more-effective diffusion barrier that could be scaled down to films that must be less than 5 nm thick. These three materials in particular will be the focus in Chapters 2 and 3. Deposition of conductive interconnect metal in shrinking vias is another common problem facing the microelectronics industry. Traditionally, Al and then Cu have been used due to their high conductivities
일반주제명Materials science.
Microelectronics.
Semiconductors.
Microscopy.
Metals.
Heat conductivity.
Chemical reactions.
Titanium nitride.
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