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Compiling Irregular Software to Specialized Hardware
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| 자료유형 | 학위논문 |
|---|---|
| 서명/저자사항 | Compiling Irregular Software to Specialized Hardware. |
| 개인저자 | Townsend, Richard. |
| 단체저자명 | Columbia University. Computer Science. |
| 발행사항 | [S.l.]: Columbia University., 2019. |
| 발행사항 | Ann Arbor: ProQuest Dissertations & Theses, 2019. |
| 형태사항 | 180 p. |
| 기본자료 저록 | Dissertations Abstracts International 81-03B. Dissertation Abstract International |
| ISBN | 9781085667111 |
| 학위논문주기 | Thesis (Ph.D.)--Columbia University, 2019. |
| 일반주기 |
Source: Dissertations Abstracts International, Volume: 81-03, Section: B.
Advisor: Edwards, Stephen A. |
| 이용제한사항 | This item must not be sold to any third party vendors. |
| 요약 | High-level synthesis (HLS) has simplified the design process for energy-efficient hardware accelerators: a designer specifies an accelerator's behavior in a "high-level" language, and a toolchain synthesizes register-transfer level (RTL) code from this specification. Many HLS systems produce efficient hardware designs for regular algorithms (i.e., those with limited conditionals or regular memory access patterns), but most struggle with irregular algorithms that rely on dynamic, data-dependent memory access patterns (e.g., traversing pointer-based structures like lists, trees, or graphs). HLS tools typically provide imperative, side-effectful languages to the designer, which makes it difficult to correctly specify and optimize complex, memory-bound applications.In this dissertation, I present an alternative HLS methodology that leverages properties of functional languages to synthesize hardware for irregular algorithms. The main contribution is an optimizing compiler that translates pure functional programs into modular, parallel dataflow networks in hardware. I give an overview of this compiler, explain how its source and target together enable parallelism in the face of irregularity, and present two specific optimizations that further exploit this parallelism. Taken together, this dissertation verifies my thesis that pure functional programs exhibiting irregular memory access patterns can be compiled into specialized hardware and optimized for parallelism.This work extends the scope of modern HLS toolchains. By relying on properties of pure functional languages, our compiler can synthesize hardware from programs containing constructs that commercial HLS tools prohibit, e.g., recursive functions and dynamic memory allocation. Hardware designers may thus use our compiler in conjunction with existing HLS systems to accelerate a wider class of algorithms than before. |
| 일반주제명 | Computer science. |
| 언어 | 영어 |
| 바로가기 | 
: 이 자료의 원문은 한국교육학술정보원에서 제공합니다. |
