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Circuit Design Obfuscation for Hardware Security
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| 자료유형 | 학위논문 |
|---|---|
| 서명/저자사항 | Circuit Design Obfuscation for Hardware Security. |
| 개인저자 | Xie, Yang. |
| 단체저자명 | University of Maryland, College Park. Electrical Engineering. |
| 발행사항 | [S.l.]: University of Maryland, College Park., 2018. |
| 발행사항 | Ann Arbor: ProQuest Dissertations & Theses, 2018. |
| 형태사항 | 174 p. |
| 기본자료 저록 | Dissertation Abstracts International 79-12B(E). Dissertation Abstract International |
| ISBN | 9780438145603 |
| 학위논문주기 | Thesis (Ph.D.)--University of Maryland, College Park, 2018. |
| 일반주기 |
Source: Dissertation Abstracts International, Volume: 79-12(E), Section: B.
Adviser: Ankur Srivastava. |
| 요약 | Nowadays, chip design and chip fabrication are normally conducted separately by independent companies. Most integrated circuit (IC) design companies are now adopting a fab-less model: they outsource the chip fabrication to offshore foundries whi |
| 요약 | Logic locking is a gate-level design obfuscation technique that's proposed to protect the outsourced IC designs from piracy and counterfeiting by untrusted foundries. A locked IC preserves the correct functionality only when a correct key is pro |
| 요약 | Split fabrication based on 3D integration technology is another approach to obfuscate the outsourced IC designs. 3D integration is a technology that integrates multiple 2D dies to create a single high-performance chip, referred to as 3D IC. With |
| 일반주제명 | Electrical engineering. Computer engineering. |
| 언어 | 영어 |
| 바로가기 | 
: 이 자료의 원문은 한국교육학술정보원에서 제공합니다. |
